F
fzn10
Hi All,
Having done my model for Amtech LV. I have noted that when Descriminating between two breakers the Pscc is taken at the load end of the circuit when analyazing discrimination between breakers.
Example being:-
The discrimination limit between upstream device Q1 and downstream device Q2 is 1.25kA. the fault current at Q2 is 10kA, the fault current at the load end of the circuit downstream of Q2 is 1kA. Amtech is telling me that I am achieving discrimination as Pscc is below 1.25kA. When I play around with circuit lengths, I managed to get a fault current of 1.5kA at the end of the circuit being supplied from Q2, only then did the program come with a warning for discrimination.
[FONT=Arial, Helvetica, sans-serif]Any ideas? I thought it is unusual that Pscc is taken at the load end of the of circuit. Shouldn't it be taken at the maximum (source of the circuit?) Are there different ways in interpreting BS Standards that I am not aware off? [/FONT]
Many Thanks
Having done my model for Amtech LV. I have noted that when Descriminating between two breakers the Pscc is taken at the load end of the circuit when analyazing discrimination between breakers.
Example being:-
The discrimination limit between upstream device Q1 and downstream device Q2 is 1.25kA. the fault current at Q2 is 10kA, the fault current at the load end of the circuit downstream of Q2 is 1kA. Amtech is telling me that I am achieving discrimination as Pscc is below 1.25kA. When I play around with circuit lengths, I managed to get a fault current of 1.5kA at the end of the circuit being supplied from Q2, only then did the program come with a warning for discrimination.
[FONT=Arial, Helvetica, sans-serif]Any ideas? I thought it is unusual that Pscc is taken at the load end of the of circuit. Shouldn't it be taken at the maximum (source of the circuit?) Are there different ways in interpreting BS Standards that I am not aware off? [/FONT]
Many Thanks