The voltages V1 and V2 do not simply summate to the supply voltage because the circuit is complex (a combination of inductive, capacitive and resistive elements) and NOT purely resistive, with each voltage having an angular component as well as a magnitude.
If you were to draw the magnitude and direction of each voltage V1 and V2 in the form of a phasor diagram this will allow you to resolve the resultant supply phasor Vs (which also has a magnitude and direction) by simple trigonometry.
As this is a parallel circuit, it would easier to analyse it in terms of current phasors referenced to the supply voltage phasor, because the supply voltage is same for both branches of the circuit.
However, I will try and describe what is happening in the circuit without phasor diagrams and leave that for you to explore.
With S1 OPEN, you will find that the supply current A1 will lag the supply voltage Vs by some angle, because the circuit is dominated by the inductive choke.
When S1 is CLOSED, current A2 will flow in the C1 branch, this current is capacitive so will lead the supply voltage by some angle. The capacitive reactance in this branch tends to cancel the inductive reactance in the other branch and as if by magic the magnitude of the supply current A1 is reduced. The actual current taken by the load does not change; it is the total supply current that decreases. This means smaller supply cables may be used. With industrial loads, the supply authority’s transformer and switchgear as well as their cable may be reduced in size.
If the reactance of the capacitive branch were equal and opposite the reactance of the inductive branch the resultant phase angle is zero and the circuit then behaves as if it was purely resistive, we say in this case that the circuit power factor is unity (1).
Therefore, the purpose of adding C1 to this circuit is to provide power factor improvement.
In order to encourage power factor improvement, the supply authorities make a higher charge to consumers who do not correct or improve their power factor to a suitable level (usually 0.95 lagging). It is not usual to improve the power factor beyond this point because the cost of providing the extra capacitance required to gain an ever-smaller decrease in current is uneconomic.
