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AT28C16 EEPROM learning experiments

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Thanks to mister -marconi , I received his chip AT28C16 gift from England !
I will start to make the 5x7 led matrix project that you did.
I will make it alone as much as I can (as usual). And I will ask you for clarifications on the way.
 
1. Connect a 0.01uF capacitor between 5 and 1.
2. Connect a 0.1uF in parallel with a 1uF electrolytic between 8 and 1.
Is the pushbutton 'normally closed' as you have drawn?
The button is staying in a open position and is closed/contacting when is pressed.
This is the type of button I am using:
1663664584070.png

Im sorry Im not that bright as you may think I am, what 5 and 1? and what 8 and 1 are you referring to?
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Ive tested separately the 7493 and it turns out is a good chip, undamaged !!! GOOD !
Then it remains theNAND and theAND chips to be verified. And if they are bad, I will have to build a gate from discrete components.
 
Im discussing this problem on another forum in parallel with this one.
I just copied what was there into here.
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So the big problem I am facing today is to make this 7493 IC count to 7....
In the proteus simulator, is working fine, but in reality, it stops to 4, doesnt matter the wiring I put on it !!!
I tried separately this circuit and now is counting up to 16, for 2IC's 7493 - the one I was using all the time and a brand new one.
1663666890787.png

So this is telling me the 7493 is a good chip, undamaged !!! GOOD !
Then, I switched to another NAND gate on the chip. Also I switched to another AND gate on the chip. You know, to try other gates from the 4 they have, in the idea maybe 1 gate is busted but the others are good.
I got the same result. It is counting and stops at 4.
It is counting to 3 actually (lit 2 leds), but when is trying to count to 4, is resetting. Like the wiring is connected for a 4 counts.... like this:
1663666922444.png

I became suspicious on my AND IC and I read carefully on it again, and it says CD4081BE. So it appears to be the right chip for an AND gate... But it behaves like a NOT gate...
It might be what you just said mister @dl324, being CMOS, easily damaged by ESD, either by me or from the guy I take it from, or board I scrap it.
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I believe it is time to make a NEW and Glorious AND gate from discrete components. I only need 1 so its not a big deal.
I never built any logic gate before. This is my first time. And my first instinct is to make if from diodes. Like in this example:
I assume that RL is a 10k?
1663666947712.png

I am also thinking to test both IC's -theNAND and theAND- and see if they are doing what they should...before building a discrete gate.
And I just tested theAND gate. It does what it say it does. When A and B are to gnd, or one is on (+) and the other is on (-), the J output stays LOW. But when both A and B are to High, the output J gets High.
BUT... with an interesting side effect. When 1 or both A and B inputs are not connected to (+) or (-), when they are floating, the output J gets High....
Ta-ta-tam !!! This may be the reason mister @dl324 was saying these chips categories dont match eachother? the TTL and CMOS? May be.
One answer is certain. If one of the inputs (or both) gets in a tristate mode (not - not +) then it's output is High, and is certainly confusing/overriding the counter.
1663666968138.png

So, I solved this --floating problem-- by inserting 2x10k on each input pin (on A and B) and indeed solved it. I only had to put 1x10k on a single pin and the output wasnt High when floating. Also, it didnt affected the normal operation at all. Only when both A and B were High the output got High. The rest of the cases, is staying Low. Which is good.
I immediately inserted into my counter circuit. Absolutly no effect, it is still counting to 4. Incredible !!!
I also put 10k on the NAND inputs, and outputs, everywhere. No effect on the counting at all, still counting to 4. Again, incredible !
What a puzzle to descifre!
 
To count from 0000 up to and including 7 ie 0111 in binary the reset to state 0 ie 0000 takes place on the 8th state ie 1000. Thus connect both reset pins to Qd.
 

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Ok, at the moment it is counting to 8. If you number from 0 to 7 you will get 8 pulses.
I need 7 counts, that means from 0 to 6. Right now, when is reaching 6, leds stay open but in the moment is counting 1 more up, to reach 7, to light all those 3 leds, it should imediately reset to 0. As usually does when is reaching a certain programmed value. But in my case it is litting all 3 leds on 7, sign that is actually counting to 8. So right now is still not good.
Unless it is some trick that you know and I dont?
1663673699315.png
 
For seven counts from state 0 to state 6 the reset to state 0 happens when the output state is 0111 ie on the seventh state.

Thus one must AND the outputs Qc, Qb and Qa to produce a reset pulse when they are logic 1. The reset pulse goes to both R1 and R2.

To avoid timing errors we should AND these three Qs in one gate. Do you have any three input ANDs, NANDs, ORs or NORs?
 
Dispense with the first ff stage ie clk a and Qa. Feed clock into clk b. Use the three ffs of second stage ie Qb, Qc and Qd only as the 1, 2 and 4 outputs respectively. Connect reset R1 and R2 together and to a logic circuit which provides a logic 1 when b, c and d are all logic 1.
 
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I thought of that as well
For theAND gate Im using CD4081BE
and for theNAND gate 74LS00
I just lift up from my chair and checked the IC's on the breadboard. Im not telling you from memory, but from seeing.
 
or.....maybe the counter 7493 is not liking theAND gate CD4081BE ? An incompatibility?
And somehow switching at #4 because some internal errors between these 2 IC's?
Yah... it might be it... its one plausible explanation.
 

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