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Discuss EFLI - measure or calculate? in the Periodic Inspection Reporting & Certification area at ElectriciansForums.net

Measure.

It is possible that your low current Continuity tester will indicate a sound connection, whilst the high current Loop Impedance tester will expose a possible weakness.

Regards

Billy
 
If you've proven continuity and measured your Ze, then calculating Zs is fine by me. But it actually doesn't take that long to measure, so I suppose you just get better piece of mind by doing so.
 
We discussed this a day or two ago and decided to verify the circuit a measured ZS was needed, can't remember which thread it was now but it made sense afetr reading it all.
 
And that's why it's better to calculate.

Parallel paths come and go, and you have already proven you have an earth so I don't agree with you at all.

I do agree with this reasoning, and as a rule I tend to calculate. If there's a lot involved with disconnections for measuring, however, I'll happily measure.
 
Time to be contraversual (if I could spell it). So I'm spurring off a RFC. I take the Zs at the "donor" socket, then do a R1 + R2 on the new bit. This to me is OK, but many would say you HAVE to do it from the board - WHY?
 
Time to be controversial. So I'm spurring off a RFC. I take the Zs at the "donor" socket, then do a R1 + R2 on the new bit. This to me is OK, but many would say you HAVE to do it from the board - WHY?

Depends on how long the spur is...





having already verified the original cct.:)
 
Always measure the Zs as this is the only test that verifies the complete circuit. To throw in my scenario from the other day with a protective device with a high internal resistance.
 
So as the MWC/EIC needs an R1+R2, how would you arrive at that? It shouldn't be done as Zs-Ze due to parallel paths. Measurement is great for circuit confirmation, but for the paperwork?
 
It is all well and good calculating it, but it doesn't prove that you have an earth, testing it does. I know calculation is acceptable, but measurement is better if you think about it, and although Ze =Zs +(R1+R2], a measured result will always be a bit lower (or should be) due to parallel paths, and the current that the tester is forcing around the circuit.

Cheers……………..Howard
I too disagree with SirKit! Its Zs = Ze +(R1+R2) :devilish:
 
just as a slight digression, yesterday was testing an existing efli on a lighting circuit. using 1553 on no-trip. MFT came up with "trp" and the RCD had, in fact, tripped. i can only assume a poor lead connection. any other thoughts? the RCD had been tested and gave ideal results on both x1 and x5. ( 34mS and 12mS).
 
just as a slight digression, yesterday was testing an existing efli on a lighting circuit. using 1553 on no-trip. MFT came up with "trp" and the RCD had, in fact, tripped. i can only assume a poor lead connection. any other thoughts? the RCD had been tested and gave ideal results on both x1 and x5. ( 34mS and 12mS).

I've had this before on my 1730. Usually existing leakage+test current pushes the RCD past it's limit (usually around 22mA on a 30mA unit).
 

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